NotesFAQContact Us
Collection
Advanced
Search Tips
Back to results
Peer reviewed Peer reviewed
Direct linkDirect link
ERIC Number: EJ985519
Record Type: Journal
Publication Date: 2012-Aug
Pages: 6
Abstractor: As Provided
ISBN: N/A
ISSN: ISSN-0018-9359
EISSN: N/A
Supporting Undergraduate Computer Architecture Students Using a Visual MIPS64 CPU Simulator
Patti, D.; Spadaccini, A.; Palesi, M.; Fazzino, F.; Catania, V.
IEEE Transactions on Education, v55 n3 p406-411 Aug 2012
The topics of computer architecture are always taught using an Assembly dialect as an example. The most commonly used textbooks in this field use the MIPS64 Instruction Set Architecture (ISA) to help students in learning the fundamentals of computer architecture because of its orthogonality and its suitability for real-world applications. This paper shows how to use the EduMIPS64 visual CPU Simulator as a supporting tool for teaching the standard topics covered by an undergraduate course in computer architecture. The proposed approach is first compared to other similar works in the field, then after a short description of the simulator, the paper focuses on how it can be used for teaching specific topics in an undergraduate computer architecture course. This discussion is then followed by a quantitative assessment of the suitability of the simulator by means of a survey compiled by students themselves; the results show that EduMIPS64 is suitable for the purpose for which it was built--that is, supporting the learning process of computer architecture topics. (Contains 3 figures and 1 footnote.)
Institute of Electrical and Electronics Engineers, Inc. 445 Hoes Lane, Piscataway, NJ 08854. Tel: 732-981-0060; Web site: http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=13
Publication Type: Journal Articles; Reports - Evaluative
Education Level: Higher Education
Audience: N/A
Language: English
Sponsor: N/A
Authoring Institution: N/A
Grant or Contract Numbers: N/A