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ERIC Number: EJ900582
Record Type: Journal
Publication Date: 2010-May
Pages: 6
Abstractor: As Provided
Reference Count: 11
ISBN: N/A
ISSN: ISSN-0018-9359
A Novel Analog Integrated Circuit Design Course Covering Design, Layout, and Resulting Chip Measurement
Lin, Wei-Liang; Cheng, Wang-Chuan; Wu, Chen-Hao; Wu, Hai-Ming; Wu, Chang-Yu; Ho, Kuan-Hsuan; Chan, Chueh-An
IEEE Transactions on Education, v53 n2 p282-287 May 2010
This work describes a novel, first-year graduate-level analog integrated circuit (IC) design course. The course teaches students analog circuit design; an external manufacturer then produces their designs in three different silicon chips. The students, working in pairs, then test these chips to verify their success. All work is completed within one semester, and the grading cycle in the most recent offering of the course extended from September 2007 to February 2008, when there were 10 students enrolled. The manufacturer's shuttle cycle is 3.5 months. Most students in the course have only a college-level electronics background. The manufacturing process is Taiwan Semiconductor Manufacturing Company's (TSMC) 0.35 micron CMOS Mixed-Signal 2P4M Polycide 3.3/5 V. The three successful chips consist of a voltage controlled oscillator, a high-performance differential amplifier, and a temperature-independent voltage reference generator. Section VI describes assessment and student feedback as well as proposed course improvement. (Contains 5 tables and 2 figures.)
Institute of Electrical and Electronics Engineers, Inc. 445 Hoes Lane, Piscataway, NJ 08854. Tel: 732-981-0060; Web site: http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=13
Publication Type: Journal Articles; Reports - Evaluative
Education Level: Higher Education
Audience: Teachers
Language: English
Sponsor: N/A
Authoring Institution: N/A
Identifiers - Location: Taiwan