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ERIC Number: EJ1016998
Record Type: Journal
Publication Date: 2013-May
Pages: 11
Abstractor: As Provided
ISBN: N/A
ISSN: ISSN-0018-9359
EISSN: N/A
SDLDS--System for Digital Logic Design and Simulation
Stanisavljevic, Z.; Pavlovic, V.; Nikolic, B.; Djordjevic, J.
IEEE Transactions on Education, v56 n2 p235-245 May 2013
This paper presents the basic features of a software system developed to support the teaching of digital logic, as well as the experience of using it in the Digital Logic course taught at the School of Electrical Engineering, University of Belgrade, Serbia. The system has been used for several years, both by students for self-learning and laboratory work, and by teachers to automate the assessment and verification of students' work. The system allows users to design and simulate a switching circuit. It also collects data on all student activities and transfers these to the school's information system. Finally, the paper gives figures demonstrating the overall benefits of the system.
Institute of Electrical and Electronics Engineers, Inc. 445 Hoes Lane, Piscataway, NJ 08854. Tel: 732-981-0060; Web site: http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=13
Publication Type: Reports - Descriptive; Journal Articles
Education Level: Higher Education; Postsecondary Education
Audience: N/A
Language: English
Sponsor: N/A
Authoring Institution: N/A
Identifiers - Location: Serbia
Grant or Contract Numbers: N/A