NotesFAQContact Us
Collection
Advanced
Search Tips
Back to results
Peer reviewed Peer reviewed
Direct linkDirect link
ERIC Number: EJ905872
Record Type: Journal
Publication Date: 2009-Nov
Pages: 8
Abstractor: As Provided
ISBN: N/A
ISSN: ISSN-0018-9359
EISSN: N/A
Power Electronics Design Laboratory Exercise for Final-Year M.Sc. Students
Max, L.; Thiringer, T.; Undeland, T.; Karlsson, R.
IEEE Transactions on Education, v52 n4 p524-531 Nov 2009
This paper presents experiences and results from a project task in power electronics for students at Chalmers University of Technology, Goteborg, Sweden, based on a flyback test board. The board is used in the course Power Electronic Devices and Applications. In the project task, the students design snubber circuits, improve the control of the output voltage, improve the gate drive of the main MOSFET transistor and study the influence of stray inductance. The project goals (the circuit improvements) are given, but the procedure for solving the problems and obtaining the results is not specified. Instead the students have to make their own specification in order to reach the goals. "Tools" that are given to the students are the hardware, measurement equipment, an example of the circuit in the circuit simulation software PSpice, and lastly lectures covering the material needed in order to attain the project goals. The project design builds on the ideas from the CDIO (Conceive, Design, Implement, Operate) initiative, where students are encouraged to consider the complete process structure. The result found was a substantial engagement by the students, who had both positive and negative reactions. The negative reactions were mainly that the project specification was too vague, in other words in the (C=Conceive)-phase of the CDIO structure. Further, the teachers observed increased learning, which also was noticeable for the students performing their M.Sc. thesis within the power electronics design area. Finally, it was found that a final written exam is definitely still needed to assess students adequately in the course. (Contains 11 figures and 1 table.)
Institute of Electrical and Electronics Engineers, Inc. 445 Hoes Lane, Piscataway, NJ 08854. Tel: 732-981-0060; Web site: http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=13
Publication Type: Journal Articles; Reports - Research
Education Level: Higher Education
Audience: N/A
Language: English
Sponsor: N/A
Authoring Institution: N/A
Identifiers - Location: Sweden
Grant or Contract Numbers: N/A